Abstract:
Progress in algorithms and simulators that exploit parallel computers are reported. Results using two generations of the Intel iPSC architecture for device analysis of 2D...Show MoreMetadata
First Page of the Article
Abstract:
Progress in algorithms and simulators that exploit parallel computers are reported. Results using two generations of the Intel iPSC architecture for device analysis of 2D and 3D bipolar problems are used to illustrate substantial progress being made in parallelization. New approaches in the areas of hydrodynamic and Monte Carlo analysis are also discussed.
Published in: [Proceedings] 1993 International Workshop on VLSI Process and Device Modeling (1993 VPAD)
Date of Conference: 14-15 May 1993
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-1338-0
First Page of the Article
