Gate driver optimization to mitigate shoot-through in high-speed switching SiC half bridge module

The high-speed switching of SiC MOSFET allows power converter to operate with higher frequency and lower switching loss. However, it tends to aggravate dv/dt effect due to the impact of parasitic parameters, resulting in shoot-through and high device stress in the half bridge configuration. In this study, a compact and high-speed gate driver is developed and optimized for SiC half bridge module. The impact of various circuit parameters including Miller capacitance, common source inductance, gate resistance and gate inductance is evaluated. The improved gate drivers with additional features are compared and optimized to eliminate shoot-through.

I. Introduction

The full SiC MOSFET module is regarded as an excellent alternative to full Si or hybrid Si/SiC module in hash environment applications such as electric vehicle, electric train as well as more electric aircraft (MEA) [1]–[5]. As a unipolar device, the absence of tail current in SiC MOSFET allows a higher switching speed compared with the bipolar Si IGBT counterpart. However, the increased dv/dt tends to aggravate the switching noise due to the impact of parasitic elements. Considering the lower threshold voltage of SiC MOSFET (2.5 V typically), it is more susceptible to the switching noise [6].