Abstract:
The paper proposes a pipelined architecture of a visual block pattern truncation coding algorithm to minimize the mean square error. Using this chip, the VBPTC based syst...Show MoreMetadata
Abstract:
The paper proposes a pipelined architecture of a visual block pattern truncation coding algorithm to minimize the mean square error. Using this chip, the VBPTC based system can be applied to real-time encoding for moving pictures.
Published in: IEEE Transactions on Consumer Electronics ( Volume: 44, Issue: 3, August 1998)
DOI: 10.1109/30.713156
