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8.2 Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logic | IEEE Conference Publication | IEEE Xplore

8.2 Batteryless Sub-nW Cortex-M0+ processor with dynamic leakage-suppression logic


Abstract:

Recent low-voltage design techniques have enabled dramatic improvements in miniaturization and lifetime of wireless sensor nodes [1-3]. These systems typically use a seco...Show More

Abstract:

Recent low-voltage design techniques have enabled dramatic improvements in miniaturization and lifetime of wireless sensor nodes [1-3]. These systems typically use a secondary battery to provide energy when the sensor is awake and operating; the battery is then recharged from a harvesting source when the sensor is asleep. In these systems, the key requirement is to minimize energy per operation of the sensor. This extends the number of operations on one battery charge and/or reduces the time to recharge the battery between awake cycles. This requirement has driven significant advances in energy efficiency [1-2] and standby power consumption [3].
Date of Conference: 22-26 February 2015
Date Added to IEEE Xplore: 19 March 2015
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Conference Location: San Francisco, CA, USA

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