Abstract:
Applications and hardware complexity management in modern systems tend to collide with efficient resource and power balance. Therefore, dedicated and power-aware design f...Show MoreMetadata
Abstract:
Applications and hardware complexity management in modern systems tend to collide with efficient resource and power balance. Therefore, dedicated and power-aware design frameworks are necessary to implement efficient multi-functional runtime reconfigurable signal processing platforms. In this work, we adopt dataflow specifications as a starting point to challenge power minimization.
Published in: 2014 IEEE Workshop on Signal Processing Systems (SiPS)
Date of Conference: 20-22 October 2014
Date Added to IEEE Xplore: 18 December 2014
Electronic ISBN:978-1-4799-6588-5
Contents 