A +27.3dBm transformer-based digital Doherty polar power amplifier fully integrated in bulk CMOS

This paper presents a digital Doherty polar power amplifier fully integrated in a 65 nm bulk CMOS process. It achieves +27.3 dBm peak output power and 32.5% peak PA drain efficiency at 3.82 GHz and 3.60 GHz, respectively. The PA demonstrates a maximum 7% back-off efficiency enhancement compared with a class-B PA and shows a robust Doherty PA operation against load variations. The 90° signal splitting at the Doherty input is realized by a compact folded transformer-based differential quadrature coupler. Active Doherty load modulation and output power combining are achieved by two transformers in a parallel configuration at the PA output. The transformer-based passive networks make the PA design ultra-compact (2.1 mm
²
) and broadband (24.9% for -1 dB bandwidth). Measurements with QPSK (1 MSym/s)/16QAM (0.5 MSym/s) signals show 3.5/4.7% rms EVM with +23.5/+22.1 dBm average output power and 26.8/24.1% PA drain efficiency.