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Design and analysis of a buck-type class-D gate driver IC | IEEE Conference Publication | IEEE Xplore
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Design and analysis of a buck-type class-D gate driver IC


Abstract:

This paper describes a design approach to minimize the gate-switching loss of a buck-type class-D gate driver. This recently-proposed gate driver works as a mini bidirect...Show More

Abstract:

This paper describes a design approach to minimize the gate-switching loss of a buck-type class-D gate driver. This recently-proposed gate driver works as a mini bidirectional buck converter itself, which charges and discharges the gate node of a power device (e.g. IGBT) by feeding a chain of short pulses into an LC filter, of which widths gradually increase or decrease. The presented analysis discusses the optimal design parameter values such as the inductance, pulse-switching frequency, internal switch sizes, and transition time. The theoretical findings are confirmed by the measurement results, which demonstrated a 62% energy-recycling while switching a 120-nC IGBT at 40-kHz and 15-V.
Date of Conference: 16-20 March 2014
Date Added to IEEE Xplore: 24 April 2014
Electronic ISBN:978-1-4799-2325-0
Print ISSN: 1048-2334
Conference Location: Fort Worth, TX, USA

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