The dependency of TSV keep-out zone (KOZ) on Si crystal direction and liner material

Through silicon via (TSV) has emerged as an essential enabler for the next generation of integrated circuits and systems for continuous performance growth and functional diversification. TSV is commonly fabricated by high aspect ratio deep silicon etching, lining with dielectric materials for electrical isolation and super-conformal filing with copper to provide the electrical path. Due to the large CTE mismatch between Si (∼2.5e-6K⁻¹) and Cu (∼17.5e-6K⁻¹), large thermo-mechanical stress is induced in the Si which causes carrier mobility variation. Silicon is an anisotropic crystalline material whose material properties depend on orientation relative to the crystal lattice. We report the dependency of the keep-out zone (KOZ) on crystal direction ([110], [100]) and show that KOZ can be reduced by using a more elastic low-k SiOC material as the liner instead of the conventional SiO2.