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A Steerable DC-1 GHz all-pass filter-Sum RF space-time 2-D beam filter in 65 nm CMOS | IEEE Conference Publication | IEEE Xplore
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A Steerable DC-1 GHz all-pass filter-Sum RF space-time 2-D beam filter in 65 nm CMOS


Abstract:

An electronically steerable broadband radio frequency (RF) filter-sum beamforming filter using 1st-order all-pass filters is proposed. The beamforming filter has the 2-D ...Show More

Abstract:

An electronically steerable broadband radio frequency (RF) filter-sum beamforming filter using 1st-order all-pass filters is proposed. The beamforming filter has the 2-D transfer function Ha (zx, sct), which uses M-section cascaded 1st-order all-pass filters and analog combiners as building blocks. Beam steering is achieved by tuning the group delay of the all-pass filters via a control voltage. For beam directions ψ ≤ 20o from array broadside, M = 1 provides close to ideal broadband response, and 1 <; M ≤ 4 is shown to provide nearly ideal broadband response for beam directions ψ > 20°. The array factor of the beamformer is evaluated using 65 nm CMOS BSIM 4 simulations of the all-pass filters and a 4-channel RF combiner for a linear antenna array of 4 antennas and is shown to provide steerable beams at 1 GHz. The CMOS simulations verify a broadband response from DC to 1 GHz.
Date of Conference: 19-23 May 2013
Date Added to IEEE Xplore: 01 August 2013
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Conference Location: Beijing, China
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I. Introduction

Advanced electronically-scanned antenna arrays find applications in radio astronomy [1], imaging systems [2], wireless communications [3], and especially in radar [4], [5]. Tunable time delays, also known as phase shifters, having negative linear phase-frequency characteristics are a fundamental building block in antenna array signal processing, especially in delay-and-sum (DAS) beamforming [6]. Conventionally, in broadband DAS beamformers, the required tunable time delays are realized at radio frequency (RF) by employing tapped transmission lines [7], sensor delay lines [8], reflection type phase shifter [9], higher order LC lattice networks. However, transmission line based tapped delay lines are difficult to tune, take up significant chip area and can be difficult to match to the other parts of the array processor for wide band operation.

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