Abstract:
Automatic assertion generation methodologies based on machine learning generate assertions at bit level. These bit level assertions are numerous, making them unreadable a...Show MoreMetadata
Abstract:
Automatic assertion generation methodologies based on machine learning generate assertions at bit level. These bit level assertions are numerous, making them unreadable and frequently unusable. We propose a methodology to discover word level features using static and dynamic analysis of the RTL source code. We use discovered word level features for the underlying learning algorithms to generate word level assertions. A post processing of assertions is employed to remove redundant propositions. Experimental results on Ethernet MAC, I2C, and OpenRISC designs show that the generated word level assertions have higher expressiveness and readability than their corresponding bit level assertions.
Date of Conference: 05-08 November 2012
Date Added to IEEE Xplore: 20 December 2012
Electronic ISBN:978-1-4503-1573-9
ISSN Information:
Conference Location: San Jose, CA, USA