Abstract:
This study presents one of the first comprehensive examinations of key issues in designing hot-carrier reliability test circuits that can provide realistic stress voltage...Show MoreMetadata
Abstract:
This study presents one of the first comprehensive examinations of key issues in designing hot-carrier reliability test circuits that can provide realistic stress voltage waveforms, allow access to the internal device nodes, and provide insight about circuit performance sensitivity to hot-carrier damage. New insights about previous test circuit designs are presented and additional new test circuit designs demonstrated. The inherent design trade-offs that exist between realistic waveform generation and internal device accessibility are analyzed and clarified. Recommendations for optimal test-circuit design for hot-carrier reliability characterization and model calibration are proposed.
Date of Conference: 17-20 March 1997
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-3243-1