On Pulse Position Modulation and Its Application to PLLs for Spur Reduction

Randomizing the positions of charge pump current pulses in a PLL breaks their periodicity and redistributes the reference spurs into broadband noise. Closed form expressions for the power spectral density (PSD) of pulse position modulated (PPM) signals are derived and intuitive explanations for the results are given. The redistributed noise has a high-pass shape and does not affect the close in phase noise of the PLL. PPM using a uniformly distributed i.i.d. sequence completely removes the spurs and provides a first-order shaping of redistributed noise. Higher order shaping and reduction of redistributed noise at intermediate offset frequencies are possible using PPM with a high-pass shaped modulating sequence and pulse repetition. Circuit implementations of these techniques are given and their nonidealities are discussed. Simulation results from a 1 GHz PLL operating from a reference frequency of 20 MHz and a bandwidth of 1 MHz confirm the results of the analysis and viability of the proposed techniques. In the presence of nonidealities spurs can be reduced by at least 13 dB without any trimming of the delays in the PPM circuits and by 25 dB after trimming the delays to within 5% of the nominal value.

I. Motivation

In the steady state of a charge pump PLL, the divide and reference edges align and the charge pump current should ideally be zero. In reality, due to circuit nonidealities like charge pump current mismatch, loop filter leakage, and feedthrough of the charge pump switches, a nonzero current which is periodic at the reference frequency is injected into the loop filter as shown in Fig. 1. This generates a periodic disturbance on the control voltage and manifests itself as a reference spur at the PLL output. The additional VCO output phase noise spectrum due to the charge pump noise can be expressed in dBc as [1] $$S_{\phi} (f)=10\log \left (S_{\rm cp} (f){\left \vert {{{Z (f)\,K_{\rm vco}}\over {f}}}\right \vert}^{2}\right)\eqno{\hbox{(1)}}$$ where is the PSD of . When is periodic at , (and hence ) consists of impulses, or spurs, at integer multiples of . To reduce spurs, the product has to be reduced. This implies a proportionally smaller bandwidth for a given loop stability margin. Several techniques [2]–[6] have been proposed to address this problem of spur magnitude and bandwidth trade-off. Reference [2] addresses the issue based on the technique of delay-sampling the control voltage. But this technique is not effective in the presence of loop filter capacitor leakage. Reference [3] minimizes the charge pump mismatch thereby reducing the spur, at the cost of increased settling time. Reference [4] uses distributed charge pump and phase frequency detector (PFD) with pulse position randomization to reduce the spur. Using distributed PFD and charge pumps can cause the total size of the charge pump switches to be larger, increasing the net feedthrough error besides an increase in implementation complexity. Fig. 1.

The standard charge pump PLL architecture showing the periodic charge pump current in steady state.