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Design of a 12-Bit 2.5 MS/s Integrated Multi-Channel Single-Ramp Analog-to-Digital Converter for Imaging Detector Systems | IEEE Journals & Magazine | IEEE Xplore

Design of a 12-Bit 2.5 MS/s Integrated Multi-Channel Single-Ramp Analog-to-Digital Converter for Imaging Detector Systems


Abstract:

This paper presents a novel design of a 12-bit multi-channel single-ramp analog-to-digital converter (ADC) for imaging detector systems. To overcome the problem of long c...Show More

Abstract:

This paper presents a novel design of a 12-bit multi-channel single-ramp analog-to-digital converter (ADC) for imaging detector systems. To overcome the problem of long conversion time in the classic Wilkinson ADC, a new architecture using a counter and delay line interpolations is proposed. Two 5-bit Gray counters are designed for the coarse conversion. The time interpolation using an array of five delay-locked loops (DLLs) and the multiphase sampling technique are proposed for the fine conversion. The 140-phase delay clocks are generated by the array and pseudo 7-bit fine resolution is achieved. A one-channel prototype chip is implemented in AMS 0.35 μm CMOS technology. The total conversion time is about 400 ns, which corresponds to a sampling rate of 2.5 MS/s. The proposed ADC can be utilized in many fields, such as high-energy physics, biomedical imaging, and space applications.
Published in: IEEE Transactions on Instrumentation and Measurement ( Volume: 60, Issue: 6, June 2011)
Page(s): 1942 - 1951
Date of Publication: 05 April 2011

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