Contents I. introduction
It is well know that images may be contaminated with noise in the process of collection, processing and transmission. Therefore, image denoising is an important part of image processing [1]. As a spatial filtering technique, median filter algorithm, compared with other filtering algorithms such as the mean filter, can effectively eliminate impulse noise, salt and pepper noise, and keep the image's edge information, which makes the image not to become too vague. Images preprocessing algorithm need to process very large amount of data. Software implementation will be time consuming. For some systems requiring real-time processing, implementation speed is often considered as a key factor, so the image preprocessing algorithm is suitable to be implemented in hardware. Field programmable gate array (FPGA) is suitable for pipelining and parallel data processing. What's more, although the median filtering algorithm processes large amount of data, but it does not require to stores a lot of intermediate data, and has the following properties: simple in computing and reproducible, thus it is suitable to be implemented using FPGA. In this paper, we make some improvements to the conventional median filtering algorithm by adding a comparison threshold to further enhance the median filter characteristics of preserving image detail [2].
