Abstract:
A totally different capacitor-less, single-transistor memory cell (1T-DRAM) is proposed and documented. Its novelty comes from the body partitioning in two distinct regio...Show MoreMetadata
Abstract:
A totally different capacitor-less, single-transistor memory cell (1T-DRAM) is proposed and documented. Its novelty comes from the body partitioning in two distinct regions, where electrons and holes are respectively confined. As compared to earlier 1T-DRAMs, the coexistence and coupling of electrons and holes is maintained even in ultrathin fully depleted MOSFETs. Selected simulations demonstrate attractive performance and great potential for embedded memory applications.
Published in: 2009 IEEE International SOI Conference
Date of Conference: 05-08 October 2009
Date Added to IEEE Xplore: 06 November 2009
ISBN Information:
Print ISSN: 1078-621X
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