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NAND trees accurately diagnose board-level pin faults | IEEE Conference Publication | IEEE Xplore

NAND trees accurately diagnose board-level pin faults


Abstract:

The NAND tree structures used in some semiconductor test methods have been used in board test environments as a simple test for open input and bidirectional pins. The tes...Show More

Abstract:

The NAND tree structures used in some semiconductor test methods have been used in board test environments as a simple test for open input and bidirectional pins. The test methods used at semiconductor test time have an unfortunate problem when used at board test: they give an incorrect diagnosis. A new test procedure is described that avoids this problem.
Date of Conference: 02 October 1995 - 06 October 1994
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-7803-2103-0
Print ISSN: 1089-3539
Conference Location: Washington, DC, USA

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