Development of matrix clip assembly for power MOSFET packages

New developments in trench technology for power MOSFET's drives intrinsic electrical silicon resistance to a minimum. This implicates that the contribution of the package resistance becomes more significant in the total electrical resistance (Rdson) of the product. Low Rdson for power packages is an important characteristic. Within the package the electrical interconnect between die top and leadframe is the main contributor to the Rdson value. In order to achieve a low Rdson the industry uses therefore (thick) wire bonding, ribbon bonding and clip bonding. The latter leads to the lowest Rdson, mainly because of the size of the clip and the low spreading resistance at the bondpad surface. In general, clip bonding is done by soldering a Cu clip to one or both bondpads and their corresponding leads. This requires a good control of the soldering process especially the positioning of the die and clips during the molten phase of the solder reflow process. At NXP a new technology has been developed that makes it possible to place clips for both, the gate and source, for a matrix of products simultaneously. The matrix-wise processing is suited for leadless packages and is applicable for a large range of power products. This paper reveals the method of matrix clip assembly applied to a power MOSFET package. A statistically significant large amount of packages has been assembled, electrically evaluated and subjected to life testing. The verification run showed a very low Rdson, high yield, wide process window and good lifetest performance. The electrical performance has been simulated and a direct comparison between real wire bonded, ribbon bonded and clip bonded samples has been made.