Physical understanding of Vth and Idsat variations in (110) CMOSFETs | IEEE Conference Publication | IEEE Xplore

Physical understanding of Vth and Idsat variations in (110) CMOSFETs


Abstract:

In this paper, the first systematic study of Vth variations (sigmaVth) and Idsat variations (sigmaIdsat) in (110) n/pMOSFETs is presented. sigmaVth in (110) n/pFETs with ...Show More

Abstract:

In this paper, the first systematic study of Vth variations (sigmaVth) and Idsat variations (sigmaIdsat) in (110) n/pMOSFETs is presented. sigmaVth in (110) n/pFETs with high channel dose are larger than (100) n/pFETs. It is found that the variations of B ion channeling, B-induced interface traps, and As-induced interface fixed charges enhance sigmaVth in (110) n/pFETs. Steep B profile and moderate P doping into the surface are desirable to minimize sigmaVth in (110) FETs. We also found that sigmaIdsat is determined by both sigmaVth and the degree of velocity saturation. sigmaIdsat of scaled (110) CMOS can be lowered compared to (100) CMOS by the optimum channel impurity design.
Date of Conference: 15-17 June 2009
Date Added to IEEE Xplore: 11 August 2009
Print ISBN:978-1-4244-3308-7

ISSN Information:

Conference Location: Kyoto, Japan

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