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Drain Current Model Including Velocity Saturation for Symmetric Double-Gate MOSFETs | IEEE Journals & Magazine | IEEE Xplore

Drain Current Model Including Velocity Saturation for Symmetric Double-Gate MOSFETs


Abstract:

A drain current model is developed for a symmetrically driven undoped (or lightly doped) symmetric double-gate MOSFET (SDGFET) under the drift–diffusion transport mechan...Show More

Abstract:

A drain current model is developed for a symmetrically driven undoped (or lightly doped) symmetric double-gate MOSFET (SDGFET) under the drift–diffusion transport mechanism, with velocity saturation effects being included as an integral part of the model derivation. Velocity saturation effects are modeled by using the Caughey–Thomas engineering model with exponent n = \hbox{2} . I_{d}V_{d}, I_{d}V_{g}, g_{m}V_{g}, and g_{\rm DS}V_{d} comparisons are made with 2-D device simulation results, and a very good match is found all the way from subthreshold to strong inversion. Gummel symmetry compliance is also shown.
Published in: IEEE Transactions on Electron Devices ( Volume: 55, Issue: 8, August 2008)
Page(s): 2173 - 2180
Date of Publication: 31 August 2008

ISSN Information:

Author image of Venkatnarayan Hariharan
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India
Venkatnarayan Hariharan (S'03) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the M.S. degree in electrical engineering from Santa Clara University, Santa Clara, CA, in 2003. He is currently working toward the Ph.D. degree in electrical engineering in the Department of Electrical Engineering, IIT Bombay.
His research interests include c...Show More
Venkatnarayan Hariharan (S'03) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the M.S. degree in electrical engineering from Santa Clara University, Santa Clara, CA, in 2003. He is currently working toward the Ph.D. degree in electrical engineering in the Department of Electrical Engineering, IIT Bombay.
His research interests include c...View more
Author image of Juzer Vasi
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India
Juzer Vasi (M'74–SM'96–F'04) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1969 and the Ph.D. degree from The Johns Hopkins University, Baltimore, MD, in 1973.
He was with The Johns Hopkins University and IIT Delhi, before moving to IIT Bombay, in 1981, where he is currently a Professor with the Department of Electrical Engineering. His researc...Show More
Juzer Vasi (M'74–SM'96–F'04) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1969 and the Ph.D. degree from The Johns Hopkins University, Baltimore, MD, in 1973.
He was with The Johns Hopkins University and IIT Delhi, before moving to IIT Bombay, in 1981, where he is currently a Professor with the Department of Electrical Engineering. His researc...View more
Author image of V. Ramgopal Rao
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India
V. Ramgopal Rao (M'98–SM'02) received the M.Tech. degree from Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the Dr. Ingenieur degree from the Universitaet der Bundeswehr Munich, Germany, in 1997.
During 1997-1998 and again in 2001, he was a Visiting Scholar with the Department of Electrical Engineering, University of California, Los Angeles. He is currently a Professor with the Department of Elect...Show More
V. Ramgopal Rao (M'98–SM'02) received the M.Tech. degree from Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the Dr. Ingenieur degree from the Universitaet der Bundeswehr Munich, Germany, in 1997.
During 1997-1998 and again in 2001, he was a Visiting Scholar with the Department of Electrical Engineering, University of California, Los Angeles. He is currently a Professor with the Department of Elect...View more

Author image of Venkatnarayan Hariharan
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India
Venkatnarayan Hariharan (S'03) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the M.S. degree in electrical engineering from Santa Clara University, Santa Clara, CA, in 2003. He is currently working toward the Ph.D. degree in electrical engineering in the Department of Electrical Engineering, IIT Bombay.
His research interests include compact model development for FinFETs and device model development for TCAD tools.
Venkatnarayan Hariharan (S'03) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the M.S. degree in electrical engineering from Santa Clara University, Santa Clara, CA, in 2003. He is currently working toward the Ph.D. degree in electrical engineering in the Department of Electrical Engineering, IIT Bombay.
His research interests include compact model development for FinFETs and device model development for TCAD tools.View more
Author image of Juzer Vasi
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India
Juzer Vasi (M'74–SM'96–F'04) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1969 and the Ph.D. degree from The Johns Hopkins University, Baltimore, MD, in 1973.
He was with The Johns Hopkins University and IIT Delhi, before moving to IIT Bombay, in 1981, where he is currently a Professor with the Department of Electrical Engineering. His research interests include CMOS devices, technology, and design. He has worked on MOS insulators, radiation effects in MOS devices, degradation and reliability of MOS devices, and modeling and simulation of MOS devices.
Juzer Vasi (M'74–SM'96–F'04) received the B.Tech. degree in electrical engineering from the Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1969 and the Ph.D. degree from The Johns Hopkins University, Baltimore, MD, in 1973.
He was with The Johns Hopkins University and IIT Delhi, before moving to IIT Bombay, in 1981, where he is currently a Professor with the Department of Electrical Engineering. His research interests include CMOS devices, technology, and design. He has worked on MOS insulators, radiation effects in MOS devices, degradation and reliability of MOS devices, and modeling and simulation of MOS devices.View more
Author image of V. Ramgopal Rao
Department of Electrical Engineering, Indian Institute of Technology Bombay, Mumbai, India
V. Ramgopal Rao (M'98–SM'02) received the M.Tech. degree from Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the Dr. Ingenieur degree from the Universitaet der Bundeswehr Munich, Germany, in 1997.
During 1997-1998 and again in 2001, he was a Visiting Scholar with the Department of Electrical Engineering, University of California, Los Angeles. He is currently a Professor with the Department of Electrical Engineering, IIT Bombay. He is the Chief Investigator for the Centre for Nanoelectronics Project, IIT Bombay, aside from being the Principal Investigator for many ongoing sponsored projects funded by various multinational industries and government agencies. He is also a working group member setup by the Ministry of Communications and Information Technology, Government of India on Nanotechnology. He has more than 200 publications in these areas in refereed international journals and conference proceedings. He is also the holder of two patents. His research interests include the physics, technology, and characterization of silicon CMOS devices for logic and mixed-signal applications, bio-MEMS, and nanoelectronics.
Prof. Rao is a Fellow of the Indian National Academy of Engineering and the Institution of Electronics and Telecommunication Engineers (IETE). He is an Editor for the IEEE Transactions on electron devices in the CMOS devices and technology area and is a Distinguished Lecturer of the IEEE Electron Devices Society. He was the Organizing Committee Chair for the 17th International Conference on VLSI Design and the 14th International Workshop on the Physics of Semiconductor Devices. He serves on the program/organizing committees of various international conferences, including the 2008 International Electron Devices Meeting (IEDM), IEEE Asian Solid-State Circuits Conference, 2006 IEEE Conference on Nano-Networks, ACM/IEEE International Symposium on Low Power Electronics and Design, and 11th IEEE VLSI Design & Test Symposium, among others. He was the Chairman of the IEEE AP/ED Bombay Chapter during 2002-2003 and currently serves on the executive committee of the IEEE Bombay Section, aside from being the Vice-Chair of the IEEE Asia-Pacific Regions/Chapters Subcommittee. He was the recipient of the Shanti Swarup Bhatnagar Prize in Engineering Sciences in 2005 for his work on electron devices; the Swarnajayanti Fellowship Award for 2003-2004, instituted by the Department of Science and Technology, Government of India; the 2007 IBM Faculty Award; and the 2008 “The Materials Research Society of India (MRSI) Superconductivity & Materials Science Prize.”
V. Ramgopal Rao (M'98–SM'02) received the M.Tech. degree from Indian Institute of Technology (IIT) Bombay, Mumbai, India, in 1991 and the Dr. Ingenieur degree from the Universitaet der Bundeswehr Munich, Germany, in 1997.
During 1997-1998 and again in 2001, he was a Visiting Scholar with the Department of Electrical Engineering, University of California, Los Angeles. He is currently a Professor with the Department of Electrical Engineering, IIT Bombay. He is the Chief Investigator for the Centre for Nanoelectronics Project, IIT Bombay, aside from being the Principal Investigator for many ongoing sponsored projects funded by various multinational industries and government agencies. He is also a working group member setup by the Ministry of Communications and Information Technology, Government of India on Nanotechnology. He has more than 200 publications in these areas in refereed international journals and conference proceedings. He is also the holder of two patents. His research interests include the physics, technology, and characterization of silicon CMOS devices for logic and mixed-signal applications, bio-MEMS, and nanoelectronics.
Prof. Rao is a Fellow of the Indian National Academy of Engineering and the Institution of Electronics and Telecommunication Engineers (IETE). He is an Editor for the IEEE Transactions on electron devices in the CMOS devices and technology area and is a Distinguished Lecturer of the IEEE Electron Devices Society. He was the Organizing Committee Chair for the 17th International Conference on VLSI Design and the 14th International Workshop on the Physics of Semiconductor Devices. He serves on the program/organizing committees of various international conferences, including the 2008 International Electron Devices Meeting (IEDM), IEEE Asian Solid-State Circuits Conference, 2006 IEEE Conference on Nano-Networks, ACM/IEEE International Symposium on Low Power Electronics and Design, and 11th IEEE VLSI Design & Test Symposium, among others. He was the Chairman of the IEEE AP/ED Bombay Chapter during 2002-2003 and currently serves on the executive committee of the IEEE Bombay Section, aside from being the Vice-Chair of the IEEE Asia-Pacific Regions/Chapters Subcommittee. He was the recipient of the Shanti Swarup Bhatnagar Prize in Engineering Sciences in 2005 for his work on electron devices; the Swarnajayanti Fellowship Award for 2003-2004, instituted by the Department of Science and Technology, Government of India; the 2007 IBM Faculty Award; and the 2008 “The Materials Research Society of India (MRSI) Superconductivity & Materials Science Prize.”View more

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