An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic | IEEE Conference Publication | IEEE Xplore

An FPGA Design Project: Creating a PowerPC Subsystem Plus User Logic


Abstract:

This paper presents a reference design and tutorial for an embedded PowerPC subsystem with user logic in a Xilinx Field Programmable Gate Array (FPGA). The design and tut...Show More

Abstract:

This paper presents a reference design and tutorial for an embedded PowerPC subsystem with user logic in a Xilinx Field Programmable Gate Array (FPGA). The design and tutorial were created to help graduate students who are doing research in complex electronic applications and want to prototype their designs in an FPGA. Specifically, the design provides a starting point for any application that requires an embedded processor plus user logic that is external to the processor block, but must interface to it. This design project provides a practical introduction to System-on- Chip (SOC) design, embedded processor design, hardware-software co-design, and general FPGA development. The design database and tutorial document can be downloaded from a website at The University of British Columbia (UBC).
Date of Conference: 03-04 June 2007
Date Added to IEEE Xplore: 11 June 2007
Print ISBN:0-7695-2849-X
Conference Location: San Diego, CA, USA

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