Abstract:
In this paper, the authors present an investigation into the benefits DUV lithography for the manufacturing of trench MOSFETs and its impact on device performance. The au...Show MoreMetadata
Abstract:
In this paper, the authors present an investigation into the benefits DUV lithography for the manufacturing of trench MOSFETs and its impact on device performance. The authors discuss experimental results for devices with a pitch size down to 0.6 mum fabricated with an unconventional implant topology and a simplified manufacturing scheme. The fabricated trench MOSFETs are benchmarked against previously published trench MOS technologies by de-embedding the parasitic substrate resistance, revealing a record-low specific on-resistance of 5.3mOmega-mm2 at a breakdown voltage of 30V(Vgs = 10V)
Published in: 2006 European Solid-State Device Research Conference
Date of Conference: 19-21 September 2006
Date Added to IEEE Xplore: 12 February 2007
Print ISBN:1-4244-0301-4
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