Abstract:
The goal of this ASIC design was to produce a single-chip PC/AT-compatible controller optimized to perform in 80486SX- and 80486DX-based computer systems running at speed...Show MoreMetadata
Abstract:
The goal of this ASIC design was to produce a single-chip PC/AT-compatible controller optimized to perform in 80486SX- and 80486DX-based computer systems running at speeds of up to 33 MHz. Since VLSI has had five years experience with preceding designs for controllers for earlier microprocessors, a library of very large, high-performance 'standard cells' performing as functional system blocks (FSBs) were utilized. The resulting ASIC device provides reliable, predictable performance in the 486-based personal computer system environment.<>
Published in: Proceedings Euro ASIC '92
Date of Conference: 01-05 June 1992
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-8186-2845-6