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Circuit-level modeling of MOS controlled thyristors | IEEE Conference Publication | IEEE Xplore

Circuit-level modeling of MOS controlled thyristors


Abstract:

Progress in developing appropriate circuit-level simulation models of the MOS controlled thyristor (MCT) for use as a tool in system design and analysis is described. Ext...Show More

Abstract:

Progress in developing appropriate circuit-level simulation models of the MOS controlled thyristor (MCT) for use as a tool in system design and analysis is described. Extensive experimental measurements of MCTs have been made, and series and parallel arrays for high voltage/current applications are in development. A simple two-transistor circuit-level model for a MCT is described here. The results of this model are compared to experimentally measured results for 15P90 and 30P100 MCTs (the first number refers to the rated RMS current, the second number to the DC blocking voltage divided by ten). While the results agree moderately well, there are a number of fundamental issues yet to be resolved. While there are good experimental characterization of MCTs under a wide range of conditions, the limitations of the standard simulation programs may prevent one from translating this into the model.<>
Date of Conference: 26-28 June 1990
Date Added to IEEE Xplore: 06 August 2002
Conference Location: San Diego, CA, USA

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