STAIC: a synthesis tool for CMOS and BiCMOS analog integrated circuits

STAIC is an interactive design tool that synthesizes CMOS and BiCMOS analog integrated circuits which conform to specified performance constraints. STAIC features an input modeling language for entering hierarchical circuit descriptions and a symbolic/numeric solver unit for dynamic integration of analytical model equations across hierarchical boundaries. All model descriptions include physical layout so that important net parasitics may be fully accounted for during design evaluation. Synthesis proceeds via successive solution refinement. Multilevel models of increasing sophistication are used by scan and optimization modules to home-in on a global optimal solution. Design experiments have shown that STAIC can produce satisfactory results.<>