Abstract:
A versatile I/O buffer is proposed to interface DDR/DDR2/GDDR3 memory types. A new robust impedance calibration scheme which fills the role of off-chip driver (OCD) and o...Show MoreMetadata
Abstract:
A versatile I/O buffer is proposed to interface DDR/DDR2/GDDR3 memory types. A new robust impedance calibration scheme which fills the role of off-chip driver (OCD) and on-die terminator (ODT) for improving signal integrity is introduced. The proposed calibration scheme minimizes quantization error and maintains 30~300Omega impedance within 3% variations
Date of Conference: 21-24 May 2006
Date Added to IEEE Xplore: 11 September 2006
Print ISBN:0-7803-9389-9
Contents 