SeaStar Interconnect: Balanced Bandwidth for Scalable Performance

The Seastar, a new ASIC from Cray, is a full system-on-chip design that integrates high-speed serial links, a 3D router, and traditional network interface functionality, including an embedded processor in a single chip. Cray Inc. designed the SeaStar specifically to support Sandia National Laboratories' ASC Red Storm, a distributed-memory parallel computing platform containing more than 11,000 network end-points. SeaStar presented designers with several challenging goals that were commensurate with a high-performance network for a system of that scale. The primary challenge was to provide a well-balanced, highly scalable, highly reliable network. From the Red Storm perspective, a balanced network is one that maximizes network performance relative to the computational power of the network end-points. A main challenge for SeaStar was to maximize the bytes-to-flops ratio of network bandwidth - that is, to maximize the amount of network bandwidth relative to each nodes floating-point capability