Simple evaluation of very low currents in process characterization | IEEE Conference Publication | IEEE Xplore

Simple evaluation of very low currents in process characterization


Abstract:

A test structure dedicated to the evaluation of very low currents for MOS process characterization is presented. The device consists of an amplifier plus a bias voltage s...Show More

Abstract:

A test structure dedicated to the evaluation of very low currents for MOS process characterization is presented. The device consists of an amplifier plus a bias voltage set implemented on the chip and connected to the leaky element. The principle is given, and SPICE simulations, based on 2- mu m CMOS industrial technology, show the structure response. Owing to this structure, a strong current amplification is obtained. Consequently, only a classical transistor parameter analyzer is required to evaluate currents in the fA range.<>
Date of Conference: 18-20 March 1990
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-87942-588-1
Conference Location: Kyoto, Japan

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