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Compact modeling of the effects of parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric nanoscale SOI MOSFETs | IEEE Journals & Magazine | IEEE Xplore

Compact modeling of the effects of parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric nanoscale SOI MOSFETs


Abstract:

A compact model for the effect of the parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric silicon-on-insulator MOSFETs is developed. ...Show More

Abstract:

A compact model for the effect of the parasitic internal fringe capacitance on the threshold voltage of high-k gate-dielectric silicon-on-insulator MOSFETs is developed. The authors' model includes the effects of the gate-dielectric permittivity, spacer oxide permittivity, spacer width, gate length, and the width of an MOS structure. A simple expression for the parasitic internal fringe capacitance from the bottom edge of the gate electrode is obtained and the charges induced in the source and drain regions due to this capacitance are considered. The authors demonstrate an increase in the surface potential along the channel due to these charges, resulting in a decrease in the threshold voltage with an increase in the gate-dielectric permittivity. The accuracy of the results obtained using the authors' analytical model is verified using two-dimensional device simulations.
Published in: IEEE Transactions on Electron Devices ( Volume: 53, Issue: 4, April 2006)
Page(s): 706 - 711
Date of Publication: 27 March 2006

ISSN Information:

Author image of M.J. Kumar
Department of Electrical Engineering, Indian Institute of Technology, New Delhi, India
M. Jagadesh Kumar (M'95–SM'99) was born in Andhra Pradesh, India. He received the M.S. and Ph.D. degrees from the Indian Institute of Technology (IIT), Madras, India, all in electrical engineering.
From 1991 to 1994, he performed post-doctoral research in the modeling and processing of high-speed bipolar transistors with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada, wh...Show More
M. Jagadesh Kumar (M'95–SM'99) was born in Andhra Pradesh, India. He received the M.S. and Ph.D. degrees from the Indian Institute of Technology (IIT), Madras, India, all in electrical engineering.
From 1991 to 1994, he performed post-doctoral research in the modeling and processing of high-speed bipolar transistors with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada, wh...View more
Author image of S.K. Gupta
Department of Electrical Engineering, Indian Institute of Technology, New Delhi, India
Sumeet Kumar Gupta (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His current research interests include device modeling and simulation. He is also interested in low power very large scale design, and memory design and testing.
Sumeet Kumar Gupta (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His current research interests include device modeling and simulation. He is also interested in low power very large scale design, and memory design and testing.View more
Author image of V. Venkataraman
Department of Electrical Engineering, Indian Institute of Technology, New Delhi, India
Vivek Venkataraman (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His research interests include semiconductor device physics, nanoscale device modeling and simulation, and organic semiconductors/electronics.
Vivek Venkataraman (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His research interests include semiconductor device physics, nanoscale device modeling and simulation, and organic semiconductors/electronics.View more

Author image of M.J. Kumar
Department of Electrical Engineering, Indian Institute of Technology, New Delhi, India
M. Jagadesh Kumar (M'95–SM'99) was born in Andhra Pradesh, India. He received the M.S. and Ph.D. degrees from the Indian Institute of Technology (IIT), Madras, India, all in electrical engineering.
From 1991 to 1994, he performed post-doctoral research in the modeling and processing of high-speed bipolar transistors with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada, where he also did research on amorphous silicon thin-film transistors. From July 1994 to December 1995, he was initially with the Department of Electronics and Electrical Communication Engineering, IIT. He then joined the Department of Electrical Engineering of the same university, where he became an Associate Professor in July 1997 and a Full Professor in January 2005. He is a reviewer for different journals including the Institution of Electrical Engineers Proceedings on Circuits, Devices and Systems, Electronics Letters and Solid-State Electronics. He is the author of more 100 publications in peer-reviewed journals and conferences. His research interests include VLSI device modeling and simulation for nanoscale applications, IC technology, and power semiconductor devices.
Dr. Kumar is a Fellow of the Institute of Electronics and Telecommunication Engineers, India. His teaching has often been rated as outstanding by the Faculty Appraisal Committee, IIT. He was the Chairman of the Fellowship Committee, The Sixteenth International Conference on Very-Large-Scale-Integration (VLSI) Design, January 4–8, 2003, New Delhi, India. He was the Chairman of the Technical Committee for High Frequency Devices, 12th International Workshop on the Physics of Semiconductor Devices, December 13–17, 2005, New Delhi, India. He is a reviewer for IEEE Transactions On Electron Devices.
M. Jagadesh Kumar (M'95–SM'99) was born in Andhra Pradesh, India. He received the M.S. and Ph.D. degrees from the Indian Institute of Technology (IIT), Madras, India, all in electrical engineering.
From 1991 to 1994, he performed post-doctoral research in the modeling and processing of high-speed bipolar transistors with the Department of Electrical and Computer Engineering, University of Waterloo, Waterloo, ON, Canada, where he also did research on amorphous silicon thin-film transistors. From July 1994 to December 1995, he was initially with the Department of Electronics and Electrical Communication Engineering, IIT. He then joined the Department of Electrical Engineering of the same university, where he became an Associate Professor in July 1997 and a Full Professor in January 2005. He is a reviewer for different journals including the Institution of Electrical Engineers Proceedings on Circuits, Devices and Systems, Electronics Letters and Solid-State Electronics. He is the author of more 100 publications in peer-reviewed journals and conferences. His research interests include VLSI device modeling and simulation for nanoscale applications, IC technology, and power semiconductor devices.
Dr. Kumar is a Fellow of the Institute of Electronics and Telecommunication Engineers, India. His teaching has often been rated as outstanding by the Faculty Appraisal Committee, IIT. He was the Chairman of the Fellowship Committee, The Sixteenth International Conference on Very-Large-Scale-Integration (VLSI) Design, January 4–8, 2003, New Delhi, India. He was the Chairman of the Technical Committee for High Frequency Devices, 12th International Workshop on the Physics of Semiconductor Devices, December 13–17, 2005, New Delhi, India. He is a reviewer for IEEE Transactions On Electron Devices.View more
Author image of S.K. Gupta
Department of Electrical Engineering, Indian Institute of Technology, New Delhi, India
Sumeet Kumar Gupta (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His current research interests include device modeling and simulation. He is also interested in low power very large scale design, and memory design and testing.
Sumeet Kumar Gupta (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His current research interests include device modeling and simulation. He is also interested in low power very large scale design, and memory design and testing.View more
Author image of V. Venkataraman
Department of Electrical Engineering, Indian Institute of Technology, New Delhi, India
Vivek Venkataraman (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His research interests include semiconductor device physics, nanoscale device modeling and simulation, and organic semiconductors/electronics.
Vivek Venkataraman (S'05) is currently working toward the B.Tech. degree in electrical engineering at the Indian Institute of Technology, Delhi, India.
His research interests include semiconductor device physics, nanoscale device modeling and simulation, and organic semiconductors/electronics.View more
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