Abstract:
Parallel thinning of silicon, close to active devices, is a risk potential specific to back side editing. Monitored FETs and ring oscillators showed no significant perfor...Show MoreMetadata
Abstract:
Parallel thinning of silicon, close to active devices, is a risk potential specific to back side editing. Monitored FETs and ring oscillators showed no significant performance change for various remaining silicon thicknesses down to SOI-like structures.
Published in: IEEE International Conference on Test, 2005.
Date of Conference: 08-08 November 2005
Date Added to IEEE Xplore: 06 February 2006
Print ISBN:0-7803-9038-5