Abstract:
A fully integrated 0.18 /spl mu/m 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a ...Show MoreMetadata
Abstract:
A fully integrated 0.18 /spl mu/m 1P6M CMOS power amplifier using internal frequency doubling is presented. Two chips were measured, one stand-alone PA and one PA with a VCO on the same chip. Since the PA and VCO operate at different frequencies, this configuration is suitable for direct-upconversion or low-IF upconversion since oscillator pulling is reduced. The maximum output power is 15 dBm, and the maximum drain efficiency is 10.7% at an output operating frequency of 2.4 GHz.
Date of Conference: 23-26 May 2005
Date Added to IEEE Xplore: 25 July 2005
Print ISBN:0-7803-8834-8
ISSN Information:
Keywords assist with retrieval of results and provide a means to discovering other relevant content. Learn more.
- IEEE Keywords
- Index Terms
- Second Harmonic Generation ,
- Power Amplifier ,
- CMOS Power Amplifier ,
- Output Power ,
- Maximum Power ,
- Maximum Efficiency ,
- Operating Frequency ,
- Maximum Output Power ,
- Wireless ,
- Power Loss ,
- Wireless Systems ,
- Differential Signal ,
- Supply Voltage ,
- Parasitic Capacitance ,
- Voltage Swing ,
- Impedance Transformer ,
- Low Supply Voltage
Contents Keywords assist with retrieval of results and provide a means to discovering other relevant content. Learn more.
- IEEE Keywords
- Index Terms
- Second Harmonic Generation ,
- Power Amplifier ,
- CMOS Power Amplifier ,
- Output Power ,
- Maximum Power ,
- Maximum Efficiency ,
- Operating Frequency ,
- Maximum Output Power ,
- Wireless ,
- Power Loss ,
- Wireless Systems ,
- Differential Signal ,
- Supply Voltage ,
- Parasitic Capacitance ,
- Voltage Swing ,
- Impedance Transformer ,
- Low Supply Voltage
