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Design of a high performance microcontroller | IEEE Conference Publication | IEEE Xplore

Design of a high performance microcontroller


Abstract:

A high performance 8-bit microcontroller, which shares the same instruction set with the standard Intel 8051, is presented in this paper. In system architecture, four-clo...Show More

Abstract:

A high performance 8-bit microcontroller, which shares the same instruction set with the standard Intel 8051, is presented in this paper. In system architecture, four-clock period per machine cycle architecture, Harvard architecture and pre-fetching instruction method are adopted to improve MCU's power efficiency. In CPU architecture, ALU of purely combinational circuits, Independent multiplier and divider module, multi-clocks architectures and hardwired control unit are adopted to get high speed. Considering power consumption, gating clock method is used to reduce the power consumption. Mapped in CSMC06 0.6/spl mu/m CMOS technology, this MCU is successfully synthesized and simulated with EDA tools and implemented in FPGA of Altera's APEX20KE. As an IP core, the MCU core can be conveniently involved in SOC.
Date of Conference: 03-03 July 2004
Date Added to IEEE Xplore: 01 November 2004
Print ISBN:0-7803-8620-5
Conference Location: Shanghai, China

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