1. Introduction

The damage of interconnect wires and vias due to electromigration is one of the most aggravating reliability problems to cope with in physical design for sub-micron IC metallization patterns. The electromigration failure effect within solid conductors is primarily caused by excessive current-density stress combined with high operating temperatures, large temperature gradients, mechanical stress and a process-and layout-dependent distribution of material transport paths [11], [12]. The flow of electrons interacts with the lattice of the conductor material, thereby removing metal atoms from their lattice positions and driving them into the direction of the current-flow. This causes the creation of material voids as well as hillocks and whiskers, resulting in either a slow drift of circuit parameters, an open circuit or even a short with neighboring wires.