Abstract:
Compiler techniques for improving instruction cache performance are described. Through repositioning of the code in the main memory, leaving memory locations unused, code...Show MoreMetadata
Abstract:
Compiler techniques for improving instruction cache performance are described. Through repositioning of the code in the main memory, leaving memory locations unused, code duplication, and code propagation, the effectiveness of the cache can be improved due to reduced cache pollution and fewer cache misses. Results of experiments indicate that significant reduction in bus traffic results from the use of these techniques. Since memory bandwidth is a critical resource in shared memory multiprocessors, such systems can benefit from the techniques described. The notion of control dependence is used to decide when instructions belonging to different basic blocks can be allowed to share the same cache line without increasing cache pollution.<>
Date of Conference: 12-16 November 1990
Date Added to IEEE Xplore: 06 August 2002
Print ISBN:0-8186-2056-0
Keywords assist with retrieval of results and provide a means to discovering other relevant content. Learn more.
- IEEE Keywords
- Index Terms
- Part Of Program ,
- Nodes In The Graph ,
- Types Of Units ,
- Additional Reduction ,
- Caching ,
- Local Memory ,
- Boundary Line ,
- End Of Block ,
- Loop Iteration ,
- Code Generation ,
- Loop Size ,
- Data Cache ,
- Clone Detection ,
- Memory Bandwidth ,
- Flow Graph ,
- Cache Size ,
- Cache Misses ,
- Conditional Branches ,
- Control Flow Graph ,
- Flow Control ,
- Control Region ,
- Control Structure ,
- System Performance
Keywords assist with retrieval of results and provide a means to discovering other relevant content. Learn more.
- IEEE Keywords
- Index Terms
- Part Of Program ,
- Nodes In The Graph ,
- Types Of Units ,
- Additional Reduction ,
- Caching ,
- Local Memory ,
- Boundary Line ,
- End Of Block ,
- Loop Iteration ,
- Code Generation ,
- Loop Size ,
- Data Cache ,
- Clone Detection ,
- Memory Bandwidth ,
- Flow Graph ,
- Cache Size ,
- Cache Misses ,
- Conditional Branches ,
- Control Flow Graph ,
- Flow Control ,
- Control Region ,
- Control Structure ,
- System Performance