An efficient inverse multiplier/divider architecture for cryptography systems

There is a vast market for cryptography, in which one of the major design concerns is to speed up the execution of encryption and decryption. It is known that the quality (in terms of speed and area) of the cryptography systems is determined by how the inversion/division operators are implemented efficiently. In this paper, we propose a new arithmetic computation architecture for Elliptic Curve Cryptography (ECC) system, which increases efficiency for inverse multiplier/divider. Specifically, we propose a new architectural design approach for inversion/division operators of ECC, which is suitable for portable embedded cryptography systems, by placing the minimization of circuit area as the primary design objective. From experiments using a set of benchmark design, it is shown that our approach is effective and efficient using less circuit area (20% for inverter/37% for divider) than that of the architecture produced by conventional methods.

1. Introduction

With the development of technology and internet, the cryptosystem becomes more and more important and the scope of application is broaden to the embedded systems. ECC (Elliptic Curve Cryptography) is one of the commonly used public key algorithms. Due to the requirement of fast computation for ECC, the core of ECC is usually implemented with hardware. In this paper, we propose an arithmetic computation architecture of the cryptosystem for portable embedded systems or smart cards. Our primary design objective is placed to the minimization of circuit area rather than to minimization of circuit delay, because chip size is firmly restricted.