Abstract:
A new single-chip microprocessor for speech recognition has been developed utilizing multi-processor architecture and pipelined structure. By DP-matching algorithm, the p...Show MoreMetadata
Abstract:
A new single-chip microprocessor for speech recognition has been developed utilizing multi-processor architecture and pipelined structure. By DP-matching algorithm, the processor recognizes up to 340 isolated words or 40 connected words in realtime.
Date of Conference: 14-16 April 1983
Date Added to IEEE Xplore: 29 January 2003
VLSI Development Division, NEC Corporation Limited, Kawasaki, Japan
C&C Systems Laboratories, NEC Corporation Limited, Kawasaki, Japan
C&C Systems Laboratories, NEC Corporation Limited, Kawasaki, Japan
C&C Systems Laboratories, NEC Corporation Limited, Kawasaki, Japan
Ist LSI Division, NEC Corporation Limited, Kawasaki, Japan
VLSI Development Division, NEC Corporation Limited, Kawasaki, Japan
VLSI Development Division, NEC Corporation Limited, Kawasaki, Japan
VLSI Development Division, NEC Corporation Limited, Kawasaki, Japan
C&C Systems Laboratories, NEC Corporation Limited, Kawasaki, Japan
C&C Systems Laboratories, NEC Corporation Limited, Kawasaki, Japan
C&C Systems Laboratories, NEC Corporation Limited, Kawasaki, Japan
Ist LSI Division, NEC Corporation Limited, Kawasaki, Japan
VLSI Development Division, NEC Corporation Limited, Kawasaki, Japan
VLSI Development Division, NEC Corporation Limited, Kawasaki, Japan
