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Development of Fully ZnO-Based 16 × 16 1S1R RRAM Crossbar Array and Performance Investigations | IEEE Journals & Magazine | IEEE Xplore

Development of Fully ZnO-Based 16 × 16 1S1R RRAM Crossbar Array and Performance Investigations


Abstract:

This study investigates the effects of co-sputtering SiC into zinc oxide (ZnO):Li (3 mol%) thin films, resulting in the formation of lithium-doped zinc oxide: silicon car...Show More

Abstract:

This study investigates the effects of co-sputtering SiC into zinc oxide (ZnO):Li (3 mol%) thin films, resulting in the formation of lithium-doped zinc oxide: silicon carbide (LZO:SiC) oxide layers. These oxide layers have different work functions (WFs) due to their distinct chemical bonding. Subsequently, these layers are stacked together to form a form-free one-selector and one-resistor (1S1R) structure. This structure comprises Pt/V/LZO:SiC2 (buffer layer)/LZO:SiC1 (oxide layer)/TiN. Notably, this marks the first successful production of a ZnO-based 1S1R structure using this method. In our experiments, we observed that this novel structure significantly enhances I–V nonlinearity, increasing it from the initial value of 2.14–62. Furthermore, according to our calculations, the optimal array size has substantially increased from the original 4 bits to over 2500 bits, indicating the enormous potential of this technology for high-density memory applications. Building on these results, we further utilized photomask manufacturing technology to successfully create a 16\times 16~1 S1R resistive random access memory (RRAM) crossbar array. To the best of our knowledge, this is the first report of applying a ZnO-based 1S1R structure to a crossbar array. This study not only demonstrates the feasibility of ZnO-based 1S1R structures but also opens new directions for future applications in high-performance memory technologies. Our findings showcase the potential advantages of this technology and provide a solid foundation for further technological development and practical applications.
Published in: IEEE Transactions on Electron Devices ( Volume: 72, Issue: 4, April 2025)
Page(s): 1702 - 1708
Date of Publication: 31 March 2025

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