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A Digital and Compact High-Precision Locking System for Pulse Laser Repetition Frequency | IEEE Journals & Magazine | IEEE Xplore

A Digital and Compact High-Precision Locking System for Pulse Laser Repetition Frequency


Abstract:

This article proposes a novel approach that employs error amplification and ADC-based dual-mixer time-difference (ADC-based-DMTD) technique for high-precision locking of ...Show More

Abstract:

This article proposes a novel approach that employs error amplification and ADC-based dual-mixer time-difference (ADC-based-DMTD) technique for high-precision locking of laser repetition frequency with compact size. This electronic system consists of two main components: a digitized error amplification module (EAM) and an FPGA-based digital frequency locking module (DFLM). The EAM mainly integrates a configurable frequency generator (CFG), a configurable frequency multiplier (CFM), and a mixer to process the laser pulses and a high-stability reference source (e.g., an atomic clock), enabling high-precision locking of pulse lasers operating at different repetition frequencies. By employing frequency multiplication and mixing, the EAM amplifies the laser’s frequency error and performs frequency downconversion, enhancing measurement sensitivity and reducing the hardware requirements of the back-end. The DFLM receives the EAM outputs by using an analog-to-digital converter (ADC)-based DMTD method to precisely measure frequency errors, and then the digital proportional-integral–derivative (PID) controller provides feedback to achieve accurate frequency locking. Initial testing with a voltage-controlled oscillator (VCO) demonstrated excellent locking performance, achieving an Allan deviation of 9.58 \times 10^{-14} at 10 s and a standard deviation (STD) of 7.7~\mu \cdot Hz root mean square (rms) after locking, marking a five-order-of-magnitude stability enhancement. In laboratory experiments with a custom-built femtosecond fiber laser, the system achieved robust locking of the repetition frequency, with a stability improvement from 1.51 \times 10^{-7} to 1.12 \times 10^{-12} at a 10-s gate time and an STD of 0.43 MHz rms after locking.
Article Sequence Number: 2007710
Date of Publication: 28 March 2025

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