I. Introduction
The possibility to use 2-D materials in an industrial complementary metal-oxide semiconductor (CMOS) process depends on several factors, but few are as critical as the capability to fabricate low-resistance metal contacts. Unfortunately, 2-D semiconductors tend to form high Schottky barriers with bulk metals, and the difficulty in achieving high doping levels in monolayers hinders the adoption of the conventional approach based on thinning these barriers enough to make them transparent to carrier tunneling [1], [2], [3].