A High-Voltage Low-Dropout Regulator with Wide Ranges of Output Capacitance and Au80Sn20 Alloy Solder for Packaging

This paper presents the circuit design and the implementation of an Low-dropout (LDO) regulator with high-voltage operation across a broad temperature range from -55 to 125 °C. The proposed LDO operates stably over wide ranges of output capacitance C_out (from 1 μF to 100 μF) and effective-series-resistance (ESR) (from tens of milliohms ceramic capacitor to several ohms aluminum electrolytic capacitor). This LDO consumes no more than 200 μA quiescent current. This low quiescent current is obtained by replacing the traditional high-voltage PNP bipolar power transistor with a P-type laterally-diffused MOS (LDMOS) counterpart, reducing the quiescent current from tens of mA to hundreds of μA. At the same time, the degradation of the transient response caused by the large gate capacitor of the P-type LDMOS power transistor is mitigated by an operational amplifier with special designed feedback path, class AB bipolar driver and dynamic bias. The measurement results show that when the load current jumps from 5 mA to 750 mA within 3 μ_s, the output voltage overshoot remains as low as 50 mV with a 1 μF of output capacitance C_OUt.