A Broadband Sub-THz Push-Push Frequency Doubler in 22 nm FDSOI

This paper presents a sub-THz push-push frequency doubler with a D-band power amplifier (PA) chain demonstrated in a 22 nm fully-depleted silicon-on-insulator (FDSOI) technology. The D-band PA comprises three common-source (CS) driver stages and a high-power stacked output stage. The amplifier stages utilize the capacitive neutralization technique for gain-boosting. Two parallel push-push doubler stages are employed after the PA. The input power distribution and matching to the PA optimum load-pull point are achieved by leveraging an area-efficient stacked transformer with two secondary coils. The overall circuitry occupies a compact core area of $0.0625 \mathrm{~mm}^{2}$. The PA and frequency doubler attains a maximal gain of 7 dB and a saturated output power $P_{\text {sat }}$ of -5 dBm, covering a 60 GHz 3 dB -bandwidth. Furthermore, the circuits exhibits a minimum suppression of 35 dBc to the fundamental frequency. The circuit’s DC-power consumption is below 230 mW, supplied by 1.6 V and 0.8 V.