Superior Scalability of Advanced Horizontal Channel Flash for Future Generations of 3D Flash Memory

We propose a novel architecture, advanced horizontal channel flash (HCF), that utilizes Local Block Interconnect (LBI), staggered Select Gate (SG), and memory cell employing Floating Gate (FG) based charge storage. The LBI can effectively reduce staircase area compared with Vertical Gate (VG) NAND designs [1]–[6], which were previously proposed to overcome the issue of cell current degradation in conventional 3D flash memory. Furthermore, the new cell structure increases the bit density by three times as it uses both sides of a string as current paths and shrinks the space between SGs. TCAD simulation shows that SGs and FG cells have good cut-off characteristics even though they suffer from interference from the backside SGs or cells. The Program/Erase window is also verified with the FG cells. These expected characteristics have been successfully demonstrated using a test vehicle fabricated with a 3D flash compatible process flow. The chip area and cell efficiency of HCF are compared to those of conventional 3D flash memory and VG-type devices. The superior scalability of bit cost with minimized 2F2 cell and small staircase area indicates that HCF is a promising candidate for future generations of 3D flash memory.