A 470μW, 102.6dB-DR, 20kHz BW Calibration-Free $\Delta\Sigma$ Modulator with SFDR in Excess of 110dBc using an Intrinsically Linear 13-Level DAC

This paper presents the first true multibit Discrete Time $\Delta\Sigma$ Modulator $(\text{DT}\Delta\Sigma \mathrm{M})$ to achieve a SFDR in excess of 110dBc without the need for Dynamic Element Matching (DEM) or calibration. The high linearity is obtained using a 13-level intrinsically linear DAC in the feedback loop. Over Process-Voltage-Temperature (PVT) variations, the SFDR is consistently between 105 and 115dBc for all measured devices. The prototype achieves a DR of 102.6dB and an SNDR of 100.7dB in a 20kHz BW, consuming 470μW from a 1.8V supply, resulting in a Schreier FoM of 178.9dB.