Investigation on Traps Dynamics & Negative Bias Stress in D-Mode GaN-on-Si Power MIS HEMTs Under High-Temperature

This experimental study investigates the traps dynamics and threshold voltage (VTH) shift mechanism under negative bias temperature stress for the GaN-on-Si Power MIS HEMTs on field plate design structure. Based on the experimental analysis, two distinct activation energies (Ea) have been identified under the specific reverse bias conditions of VGS= -30 V and VDS=0 V in a wide temperature range. Reverse bias stress experiments (up to 10 ks) show a positive VTH shift of ~1.6 V at room temperature due to the inversion of the charges at the interface between the insulator and AlGaN layer, resulting in net negative charge near the gate region. Subsequently, there is a decrease in VTH shift till $125~^{\circ }$ C because of the de-trapping of the inversion charges. This phenomenon shows a strong correlation with a thermally activated activation energy of (E ${_{\text {a}}}~\approx ~0.23$ eV). Further, the shift in ${\mathrm { V}}_{\mathrm { TH}}$ turns negative when the temperature is raised to $175~^{\circ }$ C, indicating the accumulation of electrons in the channel layer with activation energy (E ${_{\text {a}}}~\approx ~0.78$ eV) attributed to the activation of nitrogen interstitials from the GaN buffer layer. Additionally, the recovery (up to 10 ks) behavior demonstrates the exponential-linear settlement of the traps to recover the ${\mathrm { V}}_{\mathrm { TH}}$ shift. Moreover, nitrogen interstitials take more time to suppress the threshold voltage instabilities. These findings explain the ${\mathrm { V}}_{\mathrm { TH}}$ shift mechanisms in GaN-on-Si Power MIS HEMTs under NBTI.

I. Introduction

Gallium nitride (GaN) based metal-insulator semiconductor high electron mobility transistors (MIS-HEMTs) represent the breakthrough semiconductor devices in the power electronics field, facilitating lighter, smaller, and markedly efficient power supply designs due to low leakage current (<10 A at 650 V), high breakdown field (3.3 MV/cm), and low ON resistance (RON) (< 25 m for 60 A and 650 V devices) [1], [2], [3], [4]. The integration of gate field plate design with MIS structures enhances the device performance but also results in the insertion of additional charges and trapping sites, which deteriorates the stability of the device, especially for threshold voltage (V_TH), thus degrading the reliability of the devices [5], [6]. In earlier reports, Vandendaele et al. [7], Liu et al. [8], Meneghesso et al. [3], Meneghini et al. [1], and Ruzzarin et al. [9] highlighted a negative shift in due to the depletion of trap states detected at the interface of SiN/AlGaN and/or in the gate dielectrics. Li et al. [6] suggested that the shift is caused by hot electrons, which deplete the channel electrons. Zagni et al. [10] have pointed out a bidirectional shift with temperature variation at low and high electric fields owing to the electron emission from the oxide. These studies indicate that instability depends upon the type and structures of the devices. Therefore, assessing stability to determine the safe turn-on process is an important issue. For this reason, an in-depth analysis of stability under negative bias temperature instability (NBTI) for industry-standard-based gate field plate MIS-HEMT devices is required to examine the stability and reliability of the device.