An Improved Methodology for Passive Channel Signal Integrity Performance Characterization

In this paper, the signal integrity (SI) performance on typical passive channels of general servers are studied. An improved solution is proposed to test the SI performance of CPU-to-CPU and CPU-to-MCIO channels using high speed flex-rigid PCBs. Test results show that the proposed method can offer a higher test bandwidth with lower cost and less design difficulties. In addition, good correlation can be obtained between measurement and simulation of the passive channels. Such findings provide a guideline to passive channel design and evaluation of higher data speed applications in the future.