Thermal and mechanical simulations of 3D packages with custom high bandwidth memory (HBM)

Custom high bandwidth memory (HBM) directly connects the DRAM die stacks to the logic die vertically. The bottom logic die functions as both the logic and the buffer die. The 3D stacking of up to twelve DRAM dies on top of the customer-specific logic die, along with ever increasing logic die thermal design power demands, have introduced tremendous thermal management challenges. In this paper, thermal simulations are performed to analyze various types of 3D packaging architectures having custom HBM integration, including a single 3D stacked custom HBM and multiple 3D stacked custom HBMs connected to an organic substrate. Thermal hotspots are identified along the edge of the logic die. Possible mitigation plans, for example using dummy silicon and other cooling solutions, are highlighted in the paper. Besides, mechanical simulations were established to compare different thermomechanical parameters for optimized design guideline.