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Design of Shift Registers Using DG-FinFET for Low Power Applications | IEEE Conference Publication | IEEE Xplore

Design of Shift Registers Using DG-FinFET for Low Power Applications


Abstract:

Due to rapid increase in development of technology there is a need to evolve a greater necessity to improve the efficiency, effectiveness of the devices used. The perform...Show More

Abstract:

Due to rapid increase in development of technology there is a need to evolve a greater necessity to improve the efficiency, effectiveness of the devices used. The performance of the device is determined using the technology used to build a device. The improvement of the technology has been performed using different techniques. The technology was developed from basic diodes, Transistors, BJT's, MOSFET's, FinFET's and many more. The change is bought in accordance to improve the performance. This paper provides an overview of the designing and simulation of shift registers using 10nm FinFET technology in LT-spice, a popular electronic circuit simulation tool. In this paper shift registers in the four different configurations are designed using FinFET technology and analyzed its performance. The performance parameters include power consumption, noise and operating voltages. Power consumption and noise are reduced by 77.9%, 50.84% when shift registers are designed with the help of FinFET based D-Flip Flop.
Date of Conference: 23-24 April 2024
Date Added to IEEE Xplore: 26 June 2024
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Conference Location: Coimbatore, India

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