A 0.5-V Feedback-based CMOS Buffer with Rail-to-rail Operating Range

This paper presents a 0.5V CMOS flipped gain buffer (FGB) which is realized in 40nm CMOS technology and dedicated to very low-power operation environment. The circuit is able to provide gain function whereas its parallel architecture enables it to perform rail-to-rail operation. The employment of feedback mechanism effectively allows it to drive resistive load. The simulation results have shown that at buffer input transistor’s gm of 1µA/V and bias current of 36.54nA, the circuit can drive a minimum load of 7.74kΩ//20pF whilst offering input common-mode range of (3mV-482mV), output common-mode range of (4mV-478mV) and 10dB gain. The achieved bandwidth is 224.06kHz. The proposed buffer has demonstrated with improved performance metrics with respect to that of source follower and flipped source follower. Therefore, it is very useful for very low-voltage analog signal processing applications.