Design and Investigation of InGaAs/InP/InAlAs MOSFET With Optimized Switching Efficiency

In this research, the DC performance of four InGaAs MOSFETs having different technology of 22nm, 14nm, 10nm, and 7nm with highly doped source and drain region is successfully examined. A high-performance MOSFET is designed as a large current of 12mA/
$\mu $
m for a low Vgs of 0.25V is observed for InGaAs MOSFET with 7nm technology. Two multiple-layer caps are designed in both the source and drain region to reduce the parasitic capacitance. A high transconductance gain of 1.96mA/V for 7nm technology and subthreshold slope of 76.69mV/dec are achieved for InGaAs MOSFET with 14nm technology, which shows that high-performance InGaAs were created. An excellent off-state current of
$2.5 \times 10 ^{-10}$
A/
$\mu $
m is achieved for 22nm technology. The designed InGaAs MOSFETs are also capable to operate successfully in low voltage ranges, as a high amount of output current can be achieved under such conditions, which is a very demanding aspect in the present scenario.