Chapter Abstract:
The process of logic synthesis helps in achieving an optimum gate level netlist or logic implementation through higher‐level Verilog models without any concern for intern...Show MoreMetadata
Chapter Abstract:
The process of logic synthesis helps in achieving an optimum gate level netlist or logic implementation through higher‐level Verilog models without any concern for internal connections, wires, and the number of components in comparison to the lower‐level modules of gate‐level or switch‐level models. Programmable logic devices can be programmed after manufacture to obtain different logic functions. The programmable devices are categorized depending on their work, the number of hardware elements and design complexity. This chapter list a few of them. Field‐programmable gate arrays (FPGAs) contain an array of programmable logic blocks, and a hierarchy of reconfigurable interconnections that allow the blocks to be “wired together,” like many logic gates that can be interwired in different configurations. The reconfigurable capability of FPGA makes it more popular in VLSI design and application. The design failures of ASIC following fabrication can be reduced beforehand by taking such verification steps with FPGA.
Page(s): 151 - 167
Copyright Year: 2022
Edition: 1
ISBN Information: