Design and Manufacture of Space Transformer for Vertical Probe Card

In the mass production test of wafers, the probe card is widely used to connect the wafer pins to the tester head of the automatic test equipment (ATE) system. Generally speaking, the probe cards can be classified into cantilever probe cards, vertical probe cards, and MEMS probe cards. Vertical probe card with cost-effectiveness is generally selected for high-end SOC wafer test. A typical structure of the vertical probe card is shown in this paper. It is composed of PCB, space transformer (ST), probe head, and certain mechanical parts (stiffener, ring 1, and ring 2). The stiffener is used to fix the PCB, while ring1 and ring2 are used to fix the probe head. The role of the ST is to fan out the probe points from a small pitch to a large pitch. ST is the difficulty and key point of vertical probe card design and manufacture. This is mainly due to the fact that with the rapid development of integrated circuits, the array of wafer pins is getting larger and the pitch is getting smaller. Among them, the PIN scale of high-end SOC products reaches 4000~5000 pins, and the pitch reaches 80~150 μm. This brings great challenges to the design and manufacture of ST. In design, how to complete the interconnection design of all pins and ensure the performance of the transmission line is the main problem to be solved in design. In manufacturing, in addition to the manufacturing difficulties of this kind of product, in order to meet the requirements of structure and stress, ST also has the characteristics of high thickness, the general requirement of thickness is more than 2mm. This paper focuses on the design and processing of ST based on multi-layer organic (MLO) form. First of all, in the design, the layer stack-up design of this kind of ST product, the design method of general interconnect, and the design of key signals are introduced. At the same time, simulation technology is used to ensure that the design meets the application requirements. Secondly, in manufacture, the semi-additive process technology is used to process micro-lines and micro-vias, with a minimum line width of up to 25 μm and a minimum via diameter of up to 40 μm. At the same time, based on this processing technology, the core layer can be used to increase thickness to meet product requirements. In conclusion, this paper proposes a design and processing idea for ST in the vertical probe card, which provides an effective method for this kind of product.

I. Introduction

Before a semiconductor chip goes into the market, there are 4 main steps in the process of production: 1.

Wafer fabrication

2.

Wafer probe test

3.

Packaging

4.

Final test